software_APIs  1.0.0
bitbang.h
1 
2 #ifndef BITBANG_C_HEADER_FILE
3 #define BITBANG_C_HEADER_FILE
4 /*
5 reg_mprj_xfer contain
6 bit 0 : busy
7 bit 1 : bitbang enable
8 bit 2 : bitbang reset active low
9 bit 3 : bitbang load registers
10 bit 4 : bitbang clock
11 bit 5 : serial data 1
12 bit 6 : serial data 2
13 */
14 
15 void bb_clock11(){
16  reg_mprj_xfer = 0x66;
17  reg_mprj_xfer = 0x76;
18 }
19 
20 void bb_clock00(){
21  reg_mprj_xfer = 0x06;
22  reg_mprj_xfer = 0x16;
23 }
24 
25 void bb_clock10(){
26  reg_mprj_xfer = 0x46;
27  reg_mprj_xfer = 0x56;
28 }
29 
30 void bb_clock01(){
31  reg_mprj_xfer = 0x26;
32  reg_mprj_xfer = 0x36;
33 }
34 
35 void bb_load(){
36  reg_mprj_xfer = 0x06;
37  reg_mprj_xfer = 0x0e;
38  reg_mprj_xfer = 0x06;
39 }
40 
41 void bb_reset(){
42  reg_mprj_xfer = 0x04;
43  reg_mprj_xfer = 0x06;
44 
45 }
46 
47 // configure the GPIO in the left chain with configL and the GPIO in
48 // the right chain with configR
49 // left | right
50 // 18 & 19
51 // 17 & 20
52 // 16 & 21
53 // 15 & 22
54 // 14 & 23
55 // 13 & 24
56 // 12 & 25
57 // 11 & 26
58 // 10 & 27
59 // 9 & 28
60 // 8 & 29
61 // 7 & 30
62 // 6 & 31
63 // 5 & 32
64 // 4 & 33
65 // 3 & 34
66 // 2 & 35
67 // 1 & 36
68 // 0 & 37
69 void bb_configure2Gpios(unsigned int configL,unsigned int configR){
70  int num_bits,mask;
71  int left,right;
72  num_bits = get_gpio_num_bit();
73  mask = 0x1 << num_bits-1;
74  for (int i = num_bits-1; i >= 0; i--){
75  left = (configL & mask ) >> i;
76  right= (configR & mask ) >> i;
77  mask = mask >> 1;
78  if (left){
79  if (right)
80  bb_clock11();
81  else
82  bb_clock10();
83 
84  }else{
85  if(right)
86  bb_clock01();
87  else
88  bb_clock00();
89  }
90  }
91 }
92 
93 void bb_configureAllGpios(unsigned int config){
94  #ifndef ARM
95  reg_mprj_io_37 = config;
96  reg_mprj_io_36 = config;
97  reg_mprj_io_35 = config;
98  #endif
99  reg_mprj_io_34 = config;
100  reg_mprj_io_33 = config;
101  reg_mprj_io_32 = config;
102  reg_mprj_io_31 = config;
103  reg_mprj_io_30 = config;
104  reg_mprj_io_29 = config;
105  reg_mprj_io_28 = config;
106  reg_mprj_io_27 = config;
107  reg_mprj_io_26 = config;
108  reg_mprj_io_25 = config;
109  reg_mprj_io_24 = config;
110  reg_mprj_io_23 = config;
111  reg_mprj_io_22 = config;
112  reg_mprj_io_21 = config;
113  reg_mprj_io_20 = config;
114  reg_mprj_io_19 = config;
115  reg_mprj_io_18 = config;
116  reg_mprj_io_17 = config;
117  reg_mprj_io_16 = config;
118  reg_mprj_io_15 = config;
119  reg_mprj_io_14 = config;
120  reg_mprj_io_13 = config;
121  reg_mprj_io_12 = config;
122  reg_mprj_io_11 = config;
123  reg_mprj_io_10 = config;
124  reg_mprj_io_9 = config;
125  reg_mprj_io_8 = config;
126  reg_mprj_io_7 = config;
127  reg_mprj_io_6 = config;
128  reg_mprj_io_5 = config;
129  reg_mprj_io_4 = config;
130  reg_mprj_io_3 = config;
131  reg_mprj_io_2 = config;
132  reg_mprj_io_1 = config;
133  reg_mprj_io_0 = config;
134 
135  bb_reset();
136  bb_configure2Gpios(config,config);// 18 & 19
137  bb_configure2Gpios(config,config);// 17 & 20
138  bb_configure2Gpios(config,config);// 16 & 21
139  bb_configure2Gpios(config,config);// 15 & 22
140  bb_configure2Gpios(config,config);// 14 & 23
141  bb_configure2Gpios(config,config);// 13 & 24
142  bb_configure2Gpios(config,config);// 12 & 25
143  bb_configure2Gpios(config,config);// 11 & 26
144  bb_configure2Gpios(config,config);// 10 & 27
145  bb_configure2Gpios(config,config);// 9 & 28
146  bb_configure2Gpios(config,config);// 8 & 29
147  bb_configure2Gpios(config,config);// 7 & 30
148  bb_configure2Gpios(config,config);// 6 & 31
149  bb_configure2Gpios(config,config);// 5 & 32
150  bb_configure2Gpios(config,config);// 4 & 33
151  bb_configure2Gpios(config,config);// 3 & 34
152  bb_configure2Gpios(config,config);// 2 & 35
153  bb_configure2Gpios(config,config);// 1 & 36
154  bb_configure2Gpios(config,config);// 0 & 37
155  bb_load();
156 }
157 
158 #endif // BITBANG_C_HEADER_FILE
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